1. Field of the Invention
The present invention relates to an extractor of a square root.
2. Description of the Related Art
There is known an arithmetic method for extracting a square root of a number of binary digit, for instance, as disclosed in Japanese Patent Publication (KOKOKU) No. 59-2055. In the method as disclosed, an arithmetic operation is repeated for each bit starting from the most significant bit to the lower bit of a number to be extracted, so that a square root is obtained for each bit. After finishing an operation of the least significant bit of the number to be extracted, the square root is finally obtained. Therefore, if the number to be extracted is constructed, for example, by eight bits, the square root is obtained by repeating the similar operations eight times, which results in requiring a great time for the calculation. Furthermore, since the extractor of a square root as disclosed in the above Japanese patent Publication includes in its structure shift registers necessitating control circuits to control their operations, the circuit structure is made complex, which was another problem in the conventional method.